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Company: AMD
Location: Santa Clara, CA
Career Level: Mid-Senior Level
Industries: Technology, Software, IT, Electronics

Description



WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  



THE ROLE: 

As a Signal Integrity Engineer in Networking Technology & Solutions Group, you will be responsible for ensuring that AMD's next-generation products deliver industry-leading reliability, performance, and efficiency. This role involves designing, modeling, simulating and optimizing ASIC packages and the accommodating boards of the high-speed networking products.

THE PERSON:

In this role, you will closely collaborate with Silicon IP team, ASIC packaging team, PCB team, System Architect and external partners/suppliers to meet the most demanding Signal Integrity and Power Integrity requirements while ensuring the manufacturability.  

KEY RESPONSBILITIES: 

  • Design high-speed interconnects at both chip-package level and PCB level, including but not limited to ASIC package development and simulations, digital circuit (especially high speed) schematics review, PCB layout review, and board material/stack-up optimizations, etc.
  • Utilize industry-standard tools (e.g., Ansys HFSS, Cadence PowerDC/PowerSI, Keysight ADS) to evaluate the qualities of package, PCB, connector and cables; then, propose the solutions to address the issues such as reflection, crosstalk, loss, and jitter.
  • Establish the end-to-end SerDes channel model to perform IBIS-AMI and COM simulations
  • Study and develop new technologies and methodologies to optimize the design and to improve the team's efficiency.
  • Utilize multiple instruments (e.g. oscilloscope, VNA, TDR, probe station, etc) to conduct lab measurements to characterize the channel performance and correlate with the modeling simulations.

 

QUALIFICATIONS:

  • Strong understanding on high-speed digital design concepts, signal integrity analysis, and electromagnetic wave theory.
  • Familiar with high-speed interconnects and PCB (or package) design
  • Experience in SI simulation tools (Cadence, Ansys HFSS, Keysight ADS, SPICE)
  • Basic lab instruments like oscilloscope, VNA, TDR, etc.
  • Good team-collaborating skills and communication skills

ACADEMIC CREDENTIALS:

Master's degree in electrical engineering, Computer Engineering, or related field

 

LOCATION:

Santa Clara, CA

 

#LI-BW1

 

This role is not eligible for VISA sponsorship



Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD's “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.


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