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Company: AMD
Location: Taipei City, Taiwan
Career Level: Mid-Senior Level
Industries: Technology, Software, IT, Electronics

Description



WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  



THE ROLE:  

The Senior Signal Integrity Engineer leads collaboration with platform design teams to develop server SI collateral, enable advanced customer simulation capabilities, and drive resolution of complex customer signal integrity challenges.  

 

THE PERSON:  

As a Senior Product Application Engineer (PAE), you will deliver expert EPYC application support to our expanding customer base for AMD's next-generation products. You will leverage deep HSIO expertise to assess design risks, drive solution development, identify root causes of complex issues, and deliver robust, customer-ready resolutions 

 

KEY RESPONSIBILITIES:  

  • Provide expert-level technical support to customers on critical and complex design issues 

  • Collaborate crossfunctionally with internal teams (design, validation, marketing, and field) to identify, analyze, and resolve customer problems 

  • Advise customers on bestinclass HSIO design techniques, tradeoffs, and implementation of alternative solutions 

  • Develop customer SI collateral, including SI models, training materials, application notes, whitepapers, and reference optimal designs 

  • Analyze customer issues and field data to influence product improvements and future roadmap decisions 

  • Partner with customers and internal design teams to evaluate design tradeoffs and optimize performance, risk, cost, and PCB/Cable/HSIO connector manufacturability 

  • Perform HSIO simulation risk assessments across multiple interfaces including DDR, PCIe, XGMI, USB, SATA, and others 

  • Lead simulation collateral development, qualification, and validation for customer and internal use 

  • Review and provide technical signoff on customer HSIO designs 

  • Drive nextgeneration platform and interface design specifications based on customer feedback and simulation insights 

  • Drive simulation flow enhancements and automation to improve analysis efficiency, scalability, and quality 

  • Develop and review test fixtures to support validation, characterization, and customer debug activities 

 

PREFERRED EXPERIENCE:  

  • Strong background in server architecture, HSIO design, and SERDES / DDR5 simulation and validation 

  • Handson experience with time and frequencydomain simulation tools, including HFSS, SIWAVE, ADS, Seasim, and S2eye 

  • Deep knowledge of HSIO board design across interfaces such as DDR, PCIe/CLK, XGMI, USB, and SATA 

  • Proven experience with Sparameter analysis and VNA/PNA measurements 

  • Demonstrated ability to lead projects from problem definition through resolution, including documentation of designs, actions, and technical decisions 

  • Strong written and verbal communication skills, with the ability to influence and drive alignment without direct authority 

  • Effective team player with a willingness to share knowledge, mentor others, and collaborate across organizational boundaries 

  • Excellent organizational skills with the ability to prioritize, multitask, and track multiple parallel activities 

  • Experience using Python for data analysis and automation is a plus 

  • Experience with ANSYS AEDT automation and scripting is a plus 

  • Understanding of PNA/VNA PCB deembedding methodologies is a plus 

 

ACADEMIC CREDENTIALS:  

  • Master's or PhD in Physics, Communications Engineering, and Electronic Engineering. Or relevant industry experience in signal integrity  

 



Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD's “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.


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