Description
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
SMTS – DESIGN FOR TEST (DFT) ENGINEER
THE ROLE:
We are looking for an adaptive, self-motivated DFT engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The NBIO DFx team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
THE PERSON:
Will have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Implementation and verification of DFT architecture and features in NBIO IP and Subsystems
- Work closely with NBIO IP Arch, Design, Verification and PD teams
- Memory BIST logic generation, implementation, and verification
- Provide technical support to SoC and Post-Si teams to ensure successful bring up and enhance yield learning
- Mentor and coach junior engineers
PREFERRED EXPERIENCE:
- Understanding of Design for Test methodologies and DFT experience (e.g. JTAG 1149.x, IEEE 1500, IEEE 1687 iJTAG, Scan, ATPG, Memory BIST, PRBS, IO Loopback, etc.)
- Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design
- Pre-Silicon test planning & validation, engagement with Design teams
- Knowledge & experience of low power concepts, clock gating, power gating is a plus
- Debug test failures to determine the root cause; work with design engineers to resolve design defects and correct any test issues
- Good communication skills
- Good script skills including perl, tcl, python, etc.
- Experience with ATE (Automatic Test Equipment) - ATE test pattern & test flow development, debug, test and characterization
- Must have good communication skills and the ability to work in a worldwide team environment
ACADEMIC CREDENTIALS:
Bachelor's or master's degree in related discipline preferred
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
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