RTL Design Integration and SDC Engineer Job Listing at AMD in Hyderabad, TS (Job ID 76269-en-us)

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

RTL Design, Integration and SDC Engineer 

THE ROLE: 

The focus of this role is to plan and execute the front end implementation of IPs and its closure. This involves ownership of RTL integration of IPs, Sub-Systems and SoC. Must also work on SDC development, SDC generation, verification, promotion/demotion and equivalence checking. Co-ordinate with synthesis, sta and PNR teams. Guide team members on technical issues.

KEY RESPONSIBILITIES:  

• Main responsibility is to own the RTL integration of the IPs at Sub-system or SoC level including all the connectivity and usage of custom or industry tools.
• Experience with UPD and power domains, clock gating, clock network connectivity as part of the integration. 
• Other responsibility is to own constratins, SDC developement for IPs, SS and SoCs. Including SDC generation, verification, promotion, demotion and equivalence using third party or self built tools. 
• Collaborate with IP teams, synthesis, STA and PNR teams to achieve closure. 
• Understand duration required, plan and execute as per schedule.
• Debug and resolve technical issues

PREFERRED EXPERIENCE:  

• Must have worked with RTL Design, integration for multiple projects or sub-systems.
• Existing SDC, constraints development with or without using fisthail, excellicon or TCM. 
• Preferred top level or SOC level experience
• Have handled blocks with complex designs, high frequency clocks and complex clocking
• Complete understanding of timing constraints, low power aspects and concepts of DFT
• Have debug experience to solve issues.
• Interst in AI, Scripting and automation

ACADEMIC CREDENTIALS:  

• Bachelors with 5 years of experience or Masters degree with 3 years of experience in Electrical Engineering

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.