SoC Power, Performance and Product Definition Lead Job Listing at AMD in Bengaluru, KA (Job ID 77213-en-us)

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

SMTS - SOC POWER, PERFORMANCE & PDL OWNER

 

THE ROLE: 

We are looking for a Senior Member of Technical Staff (SMTS) to own Product Definition Limits (PDL) for a next-generation x86 SoC, with end-to-end accountability across power, frequency, and electrical constraints. This role sits at the intersection of SoC architecture, silicon, power management, and system performance, and is critical to enabling robust frequency attainment and safe operating envelopes across all silicon corners.

 

 

 

THE PERSON: 

This AMD (Advanced Micro Devices) team is looking for a senior level person that can help guide the team, mentor upcoming talent, provide long range strategy, and is willing to jump in to help resolve issues quickly. You will be the single-threaded owner for defining, validating, and tuning Base and Boost frequency behavior, EDC/TDC limits, and power-performance trade-offs across SS, TT, and FF silicon, from early silicon bring-up through product maturity.

 

KEY RESPONSIBILITIES: 

DL & Frequency Ownership

• Own Product Definition Limits (PDL) for the SoC, including:
  • Base and Boost frequency definition and validation
  • Frequency attainment across SS / TT / FF silicon
  • Corner-aware performance-power guard-banding strategies
• Drive frequency closure from early silicon to production readiness.

Electrical & Power Constraints

• Define, validate, and tune electrical parameters, including:
  • EDC (Electrical Design Current)
  • TDC (Thermal Design Current)
  • Power delivery and current-limit constraints
• Partner with PD, silicon, and platform teams to ensure electrical limits are safe, performant, and scalable across SKUs.

SoC Power & Performance Leadership

• Deeply analyze power-frequency-voltage (P-F-V) behavior across workloads, operating points, and silicon skew.
• Identify and close power or electrical bottlenecks impacting frequency or performance.
• Drive data-backed recommendations on fuse settings, limits, and policies.

Cross-Functional Influence

• Act as the PnP technical authority for PDL-related decisions.
• Work closely with:
  • SoC Architecture
  • Power Management / FW
  • Silicon Validation
  • Platform / VR / Thermal teams
• Influence architecture and power-management decisions for future SoCs based on learnings.

Execution & Technical Mentorship

• • Set best practices for SoC-level PnP analysis and sign-off.
  • Mentor junior engineers and raise the technical bar for the broader PnP team.
  • Represent PnP in program, readiness, and executive reviews.

 

PREFERRED EXPERIENCE: 

• 10+ years of hands-on experience in SoC power and/or performance engineering.
• Strong understanding of:
  • SoC architecture (CPU, interconnect, memory, accelerators)
  • DVFS, power states, boost algorithms
  • Silicon corner behavior (SS / TT / FF)
• Proven experience with:
  • Base/Boost frequency definition or validation
  • EDC / TDC / power-limit modeling and tuning
• Ability to analyze silicon data and convert it into actionable product limits.
• Comfortable owning ambiguous, cross-cutting technical problems.  

DIFFERENTIATING SKILLS

• Experience with x86 or high-performance SoCs.
• Understanding of:
  • VR and power delivery constraints
  • Thermal-electrical-performance interactions
• Post-silicon bring-up and silicon learning cycles.
• Ability to influence without authority across large orgs.

WHAT MAKES THIS ROLE IMPACTFUL

• True ownership role — you define how the SoC performs in the real world.
• Direct influence on product performance, power efficiency, and customer experience.
• Opportunity to shape PnP strategy and methodology for future platforms.
• High visibility with architecture, silicon, and leadership teams.

ACADEMIC CREDENTIALS: 

• Bachelor's or Master's in Electrical Engineer, Computer Engineering, Computer Science, or a closely related field 

 

#LI-NR1

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD's “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

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